1. Field of the Invention
The present invention relates to a power source circuit provided with a boosting circuit for boosting power source voltage.
2. Background Art
Conventionally, a semiconductor storage device such as, for example, a NAND type flash memory is provided with a power source circuit which makes power source voltage boosted by a boosting circuit and supplied.
For example, a semiconductor storage device, such as a NAND type flash memory, needs a potential higher than a power source voltage for data reading, writing and erasing operations. For this reason, such a semiconductor storage device is provided with a boosting circuit for boosting power source voltage and a voltage detecting circuit for maintaining the boosted potential at a set potential.
The boosting circuit boosts the power source voltage by being constituted in such a manner that a MOS transistor and a capacitor are connected in series, and one end of the capacitor is connected with mutually complementary CLK and CLKB signals.
Furthermore, the voltage detecting circuit is provided with a voltage dividing circuit and a comparison amplifier, and an output terminal of the boosting circuit and a ground potential are connected in series via the voltage dividing circuit. The comparison amplifier compares a monitor potential outputted by the voltage dividing circuit with a reference potential.
As an example for changing a detection level of the voltage detecting circuit, there is a method in which a plurality of n-type MOS transistors whose source is set as the ground potential are connected to connection points between voltage dividing resistors of the voltage dividing circuit, and selection signals are inputted into the gates of the MOS transistors, respectively.
The set potential of the output of the boosting circuit is determined by the selection signal. When the output of the boosting circuit is lower than the set potential, the monitor potential is lower than the reference potential, so that the comparison amplifier switches its output to, for example, “High”. This output sets the boosting circuit to an activated state, so that the output of the boosting circuit is boosted by the CLK/CLKB signal.
On the contrary, when the output of the boosting circuit is higher than the set potential, the monitor potential is higher than the reference potential, so that the comparison amplifier switches its output to, for example, “Low”. This output sets the boosting circuit to a deactivated state, and stops the operation of the boosting circuit by interrupting the CLK/CLKB signal.
As described above, the power source detecting circuit activates and deactivates the boosting circuit, thereby making it possible to maintain the output of the boosting circuit in the vicinity of the set potential.
However, in the above described boosting operation, the output potential does not always remain at a fixed potential, but vibrates in the vicinity of the set potential. This phenomenon is referred to as a ripple, which is increased and decreased by an RC time constant based on a resistance value of the voltage dividing resistors, an operation delay of the comparison amplifier, and a boosting capability of the boosting circuit. When the resistance value of the voltage dividing resistors is large, when the operation delay of the comparison amplifier is large, and when the boosting capability of the boosting circuit is large, the ripple is increased.
Here, when the resistance value of each voltage dividing resistor is the same, and the same comparison amplifier is also used, the reaction rate of the voltage detecting circuit to variation of the potential of the boosting circuit is fixed. Therefore, the switching time of the voltage detecting circuit is almost fixed.
Furthermore, the output potential and current of the boosting circuit are in a relation in which when the output potential of the boosting circuit is high, the output current is small, and in which when the output potential of the boosting circuit is low, the output current is large.
Therefore, in the output of the boosting circuit when the set potential of the voltage detecting circuit is low, the current which can be outputted for a fixed time is large, and hence the ripple is increased.
On the other hand, when the set potential of the voltage detecting circuit is high, the current which can be outputted for the fixed time is small, and hence the ripple is reduced.
Here, in another aspect, data are written in the cells of the NAND type flash memory by using the potential boosted by the boosting circuit.
However, the cell characteristics are not uniform for all the cells, which causes the write-enable write potential for the cell to be different.
Accordingly, the NAND type flash memory has a characteristic that while the write potential is gradually increased from a suitable initial value, the writing operation is performed each time the write potential is increased, so as to make it possible to complete the writing operation successively from a cell having a low write-enable potential to a cell having a high write-enable potential.
In order to realize such writing operation, each voltage dividing resistance of the voltage detecting circuit, which determines the set potential of the boosting circuit, is adjusted so as to obtain the desired potential gradually increased in this manner.
Thus, as described above, in the case where the set potential is changed, there is a problem that when the set potential is low, the ripple in the output of the boosting circuit is increased.
In the writing operation to the cells of the NAND type flash memory, when the ripple in the word line of selected cells and unselected cells is large, for example, the distribution of threshold voltage Vth of the write cells is dispersed, and the unselected cells are erroneously written. Therefore, it is preferred that the ripple is small.
However, as described above, in the writing operation to the cells having a low write-enable potential, when the output of the boosting circuit is set to low by adjusting the voltage dividing resistance of the power source detecting circuit, the ripple is increased in the conventional circuit, so that the writing characteristic to the memory cell is deteriorated.
As the conventional power source circuit, there is provided a circuit including a plurality of boosting circuits which boost a voltage supplied from a power source and generate an output potential, a plurality of CP output control circuits which monitor the output potential and output a signal for instructing activation/deactivation of the boosting circuit, an oscillator to which the output (voltage for performing OSC control operation) of the CP output control circuit is inputted, and a clock buffer circuit to which the oscillation output of the oscillator is inputted, and which outputs a signal to the boosting circuit (see, for example, Japanese Patent Laid-Open Publication No. 11-154396).
The respective CP output control circuits are designed to operate stepwise according to the transition of the output voltage, so as to make their output detection voltages different from each other.
Furthermore, the above described conventional power source circuit controls the number of the boosting circuits which are operated stepwise according to the transition of the output voltage, in order to reduce the ripple with respect to one set potential.
Therefore, in the above described conventional technique, it is not possible to reduce the set potential dependency of the boosting capability and to reduce the ripple, in correspondence with a plurality of set potentials.